Nand2Tetris – The ALU Chip

In Chapter 2 of Nand2Tetris we build the Arithmetic Logic Unit chip. It has 2 16-bit inputs and 1 16-bit output. While providing the inputs you also specify the arithmetic operation you want to perform; . This ALU chip is designed to become the centerpiece of HACK.

In addition to ALU’s there are FPU’s (Floating Point Unit) and CPU’s (Central Processing Unit). ALU’s are used to build these more complex chips, which may contain many ALU’s.

John von Neumann proposed ALU’s in 1945 but components were large and expensive for the type of ALU we are building now.
Initially, they performed operations on single bit data. Now that we have integrated circuit (IC) transistors we are able to build ALU’s so complex they can handle operations in a single clock cycle.

Someone in my group documented errors you may come across building the ALU. Hope this helps,

Nand2Tetris and HDL

In my local ruby group we’ve been working through Nand2Tetris. A program that walks through building a computer from logic gates to programing Tetris.

I’m struggling with the Hardware Description Language(HDL). I have built up assumptions about languages and their use of variables and functions. Below are my notes that have helped me straighten out how to work with HDL’s.

HDL is a markup language, like HTML or XML. We use this markup language to design logic gates. Logic gates will be described in syntax familiar to you as pseudocode. For example:

Chip Name: Or
 Inputs: a, b
 Outputs: out
 Function: If a=b=0 then out=0 else out=1.

HDL doesn’t have if/else syntax. This is telling us to use boolean arithmetic to create out=1 if a or b is 1.

Chip Body

The chip body is self explanatory. Here is the Or gate HDL file.

 //Declaring a Chip named 'or'. The definition is between the brackets.

IN a, b;
  OUT out;
  //Header of the chip. It declares the expected wires IN and OUT.

 //Here are the logical statements that describe how IN gets to OUT.
 Not(in=a, out=nota); // Invert a into nota
 Not(in=b, out=notb); // Invert b into notb
 Nand(a=nota, b=notb, out=out); // Nand's truth table will now output Or's truth table


Statements will be a single line representing a chip and how it is used.

Not(in=a, out=nota);

If you looked at Not.hdl you would see in the Chip declaration an IN of in and and OUT of out. These names represent physical wires that are coming in and out of the chip.


Everything on the left side of ‘=’ is the name of the pin going in. Everything on the right is the name of the pin going out.

When you name a pin you can use characters (uppers & lowers), numbers, and ‘-‘. Pin names have to start with an lowercase letter.

In addition to pins, we can provide boolean values using ‘true’ or ‘false’.

Nand(a=in, b=true, out=out);

If we are only concerned with the input of ‘a’ we can supplement the input of ‘b’ with a boolean.

Not declaring a pin is not a problem. The HardwareSimulator will supplement it with false (0).

 //The a and b pins are not declared so their values
 // default to 0. Nand returns 1 if a and b are both 0.

We can also declare additional pins. Say we have a statement that declares the out pin but we also need that value for another statement.

Xor(a=a, b=b, out=sum);
 Or(a=a, b=sum, out=carry);

In this chip, ‘sum’ and ‘carry’ are the out pins. If we run this in the Hardware Simulator it will result in an error: “Can’t connect gate’s output to part:”.

Remember, ‘sum’ is a declared physical wire coming out of the chip. We cannot re-route it. However, we can declare additional outs:

Xor(a=a, b=b, out=ab, out=sum);
 Or(a=a, b=ab, out=carry);